Author:
Levantino Salvatore,Samori Carlo
Reference52 articles.
1. All-digital TX frequency synthesizer and discrete-time receiver for bluetooth radio in 130-nm CMOS;Staszewski;IEEE Journal of Solid-State Circuits,2004
2. A low-noise wide-BW 3.6-GHz digital ΔΣ fractional-N frequency synthesizer with a noise-shaping time-to-digital converter and quantization noise cancellation;Hsu;IEEE Journal of Solid-State Circuits,2008
3. A 700-kHz bandwidth ΣΔ fractional synthesizer with spurs compensation and linearization techniques for WCDMA applications;Temporiti;IEEE Journal of Solid-State Circuits,2004
4. M. Gupta and B.-S. Song, A 1.8GHz spur-cancelled fractional-N frequency synthesizer with LMS-based DAC gain calibration, IEEE International Solid-State Circuits Conference. Digest of Technical Papers, pp. 1922–1923, February 2006.
5. A brief introduction to time-to-digital and digital-to-time converters;Roberts;IEEE Transactions on Circuits and Systems–II: Express Briefs,2010