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Electrical analysis of external mechanical stress effects in short channel MOSFETs on (001) silicon

  • Published:2004-04 Issue:4 Volume:48 Page:561-566
  • ISSN:0038-1101
  • Container-title:Solid-State Electronics
  • language:en
  • Short-container-title:Solid-State Electronics

Author:

Gallon C.,Reimbold G.,Ghibaudo G.,Bianchi R.A.,Gwoziecki R.

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference10 articles.

1. A new aspect of mechanical stress effects in scaled MOS devices;Hamada;IEEE Trans. Electron Dev.,1991

2. NMOS drive current reduction caused by transistor layout and trench isolation induced stress;Scott;IEDM Tech. Dig.,1999

3. En WG, Ju D-H, Chan D, Chan S, Karlson O. Reduction of STI/active stress on 0.18 μm SOI devices through modification of STI process. In: IEEE Int SOI Conf, 2001. p. 85–6

4. Piezoresistive characteristics of short-channel MOSFETs on (100) silicon;Bradley;IEEE Trans. Electron Dev.,2001

5. Locos-induced stress effects on thin-film SOI devices;Huang;IEEE Trans. Electron Dev.,1997

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