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3. Impact of SOI and Si-GeOI and GeOI substrates on CMOS compatible tunnel FET performance;Mayer,2008
4. Double-gate strained heterostructure tunneling FET (TFET) with record high drive currents and less than 60mV/dec subthreshold slope;Krishnamohan,2008
5. Characterization, and physics of III–V heterojunction tunneling field effect transistors (H-TFET) for steep sub-threshold swing;Dewey,2011