Author:
Waite A.M.,Lloyd N.S.,Osman K.,Zhang W.,Ernst T.,Achard H.,Wang Y.,Deleonibus S.,Hemment P.L.F.,Bagnall D.M.,Evans A.G.R.,Ashburn P.
Subject
Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials
Reference17 articles.
1. Threshold voltage model for deep sub micrometer MOSFETs;Liu;IEEE Trans Electron Dev,1993
2. Improved hot electron degradation in nMOSFETs with elevated source and drain structures realized by SEG of silicon using silane only;Afshar-Hanaii;Electron Lett,1993
3. Gwoziecki R, Jurczak M, Skotnicki T, Regolini J-L, Paoli M. Suitability of elevated source/drain for deep submicron CMOS. In: Proceedings of the ESSDERC. Leuven, Belgium, 1999. p. 384–7
4. Lee JH, Lee SC, Kwak NY, Yeo IS, Yeom CY, Ritterbush S, et al. High performance buried channel pFETs using elevated source/drain structure with self-aligned epitaxial silicon sliver (SESS). In: Proceedings of the SSDM. Tokyo, Japan, 1999. p. 38–9
5. Silicon selective epitaxial growth and electrical properties of epi/sidewall interfaces;Ishitani;Jpn J Appl Phys,1989
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