A study of gateless OTP cell using a 45nm CMOS compatible process-Reference-Cited by-同舟云学术

A study of gateless OTP cell using a 45nm CMOS compatible process

Published:2009-10 Issue:10 Volume:53 Page:1092-1098
ISSN:0038-1101
Container-title:Solid-State Electronics
language:en
Short-container-title:Solid-State Electronics

Author:

Tsai Yi-Hung,Lin Kai-Chun,Chiu Hsin-Yi,Shih Hung-Sheng,King Ya-Chin,Lin Chrong Jung

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference28 articles.

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3. Mattis BA, Subramanian V. Stacked low-power field-programmable antifuse memories for RFID on plastic. In: IEDM technical digest; 2006.

4. Wee J-K, et al. An antifuse EPROM circuitry scheme for field-programmable repair in DRAM. IEEE JSSC; 2000. p. 1408–14.

5. Cha H-K, et al. A 32-KB Standard CMOS Antifuse One-Time-Progammable ROM Embedded in a 16-bit Microcontroller. IEEE JSSC; 2006. p. 2115–24.

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