A unified 2-D model for nanowire junctionless accumulation and inversion mode MOSFET in quasi-ballistic regime-Reference-Cited by-同舟云学术

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A unified 2-D model for nanowire junctionless accumulation and inversion mode MOSFET in quasi-ballistic regime

Published:2022-07 Issue: Volume:193 Page:108282
ISSN:0038-1101
Container-title:Solid-State Electronics
language:en
Short-container-title:Solid-State Electronics

Author:

Baral Kamalaksha,Singh Prince Kumar,Kumar Sanjay,Singh Ashish Kumar,Jarwal Deepak Kumar,Jit Satyabrata

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference39 articles.

1. Multiple-gate SOI MOSFETs;Coling;Solid. State. Electron,2004

2. Design optimization of gate-all-around (GAA) MOSFETs;Song;IEEE Trans Nanotechnol,2006

3. FinFET versus gate-all-around nanowire FET: Performance, scaling, and variability;Nagy;IEEE J Electron Devices Soc,2018

4. Nanowire transistors without junctions;Colinge;Nat Nanotechnol,2010

5. Colinge J, Greer J. “Nanowire Transistors: Physics of Devices and Materials in One Dimension”. Cambridge: Cambridge University Press., 2016, doi:10.1017/CBO9781107280779.

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