Impact of connection areas on the electrical behaviour of FET contact trenches with increasing aspect ratio

Author:

Hößler Diana

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference10 articles.

1. Silicon compatible materials, processes, and technologies for advanced integrated circuits and emerging applications 7;Roozeboom;The Electrochem Soc.,2017

2. Highly-selective superconformai CVD Ti silicide process enabling area-enhanced contacts for next-generation CMOS architectures;Breil;Symp VLSI Technol,2017

3. Pedram, 7nm FinFET standard cell layout characterization and power density prediction in near- and super-threshold voltage regimes;Cui;Int Green Comput Conf,2014

4. Meiser A, Schlösser T, Gebhardt K-H, Weber D. Verfahren zum Herstellen einer integrierten Schaltung einschließlich eines lateralen Graben-Transistors und eines Logikschaltungselements DE102016106872A1 2017 US20170301791.

5. Lo C-H, Lee J-W, Lin W-J, Tseng J-C, FinFET Body Contact and Method of Making Same, US20140193959A1, 2014. https://patents.google.com/patent/US20140193959/en.

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