Author:
Kawanago T.,Kakushima K.,Ahmet P.,Kataoka Y.,Nishiyama A.,Sugii N.,Tsutsui K.,Natori K.,Hattori T.,Iwai H.
Subject
Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials
Reference17 articles.
1. Auth C, Allen C, Blattner A, Bergstrom D, Brazier M, Bost M, et al. A 22nm high performance and low-power CMOS technology featuring fully-depleted tri-gate transistors, self-aligned contacts and high density MIM capacitors. In: VLSI Symp tech dig, 2012. p. 131–2.
2. Chang JB, Guillorn M, Solomon PM, Lin C-H, Engelmann SU, Pyzyna A, et al. Scaling of SOI FinFETs down to fin width of 4nm for the 10nm technology node. In: VLSI Symp tech dig, 2011. p. 12–13.
3. Saito S, Hisamoto D, Kimura S, Hiratani M. Unified mobility model for high-k gate stacks. In: IEDM Tech dig, 2003. p. 797–800.
4. Ando T, Frank MM, Choi K, Choi C, Bruley J, Hopstaken M, et al. Understanding mobility mechanisms in extremely scaled HfO2 (EOT 0.42nm) using remote interfacial layer scavenging technique and Vt-tuning dipoles with gate-first process. In: IEDM Tech dig, 2009. p. 423–6.
5. EOT of 0.62nm and high electron mobility in La-silicate/Si structure based nMOSFETs achieved by utilizing metal-inserted poly-Si stacks and annealing at high temperature;Kawanago;IEEE Trans Electron Dev,2012
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