Author:
Lo Yu-Lung,Tsao Chih-Chiang
Subject
Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials
Reference12 articles.
1. Response surface methodology;Myers,1971
2. Crossing the 200 wire barrier in VLSI bonding;Dehaine;Proc ISHM Symp,1984
3. Shu S. Fine pitch wire bonding development using a new multipurpose, multi-pad pitch test die. 41st Electronic Component and Technology Conference Proceedings, 1991. p. 511–8
4. Wire bond loop profile development for fine pitch-long wire assembly;Groover;IEEE Trans Semicond Manufact,1994
5. Tay AAO, Seah BC, Ong SH. Finite element simulation of wire looping during wirebond fabrication. ASME, J Electrical Packaging, in press
Cited by
19 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献