Lifetime improvement by exploiting aggressive voltage scaling during runtime of error-resilient applications-Reference-Cited by-同舟云学术

Lifetime improvement by exploiting aggressive voltage scaling during runtime of error-resilient applications

Published:2018-03 Issue: Volume:61 Page:29-38
ISSN:0167-9260
Container-title:Integration
language:en
Short-container-title:Integration

Author:

Nakhaee Farzaneh,Kamal Mehdi,Afzali-Kusha Ali,Pedram Massoud,Fakhraie Sied Mehdi,Dorosti Hamed

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Reference53 articles.

1. Process variation and temperature-aware full chip oxide breakdown reliability analysis;Zhuo;IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.,2011

2. J. Srinivasan, S.V. Adve, P. Bose, J.A. Rivers, The case for lifetime reliability-aware microprocessors, in: Proceedings of the 31st Annual International Symposium on Computer Architecture, (ISCA '04), 2004, pp. 276–288.

3. Variation-Aware and Aging-Aware Design Tools and Techniques for Nanometer-Scale Integrated Circuits (Ph.D., Faculty of the Graduate School);Gupta,2012

4. Aging Analysis and Aging-Resistant Design for Low-Power Circuits;Parthasarathy,2014

5. M.B.d. Silva, V.V.A. Camargo, L. Brusamarello, G.I. Wirth, R.d. Silva, NBTI-aware technique for transistor sizing of high-performance CMOS gates, 10th Latin American Test Workshop, 2009, pp. 1–5.

Cited by 12 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Nanoscale CMOS Biasing Circuit for Analog Applications: The Impact of NBTI Degradation;2023 International Conference for Advancement in Technology (ICONAT);2023-01-24

2. Decoupling GPGPU voltage-frequency scaling for deep-learning applications;Journal of Parallel and Distributed Computing;2022-07

3. EFFORT: A Comprehensive Technique to Tackle Timing Violations and Improve Energy Efficiency of Near-Threshold Tensor Processing Units;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2021-10

4. Robust Computing for Machine Learning-Based Systems;Dependable Embedded Systems;2020-12-10

5. Circuit-Level Techniques for Logic and Memory Blocks in Approximate Computing Systemsx;Proceedings of the IEEE;2020-12