A near-threshold 10T differential SRAM cell with high read and write margins for tri-gated FinFET technology-Reference-Cited by-同舟云学术

A near-threshold 10T differential SRAM cell with high read and write margins for tri-gated FinFET technology

Published:2018-03 Issue: Volume:61 Page:125-137
ISSN:0167-9260
Container-title:Integration
language:en
Short-container-title:Integration

Author:

Limachia Mitesh,Thakker Rajesh,Kothari Nikhil

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Reference33 articles.

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3. A. Wang, A. Chandrakasan, A 180mV FFT processor using subthreshold circuit techniques, in: Proceedings of IEEE International Solid-State Circuits Conference Digital Tech. Papers, vol. 1, 2004, pp. 292–529.

4. Yield-driven near-threshold SRAM design;Chen;IEEE Trans. Very Large Scale Integr. VLSI Syst.,2010

5. Static noise margin variation for subthreshold SRAM in 65-nm CMOS;Calhoun;IEEE J. Solid-State Circuits,2006

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