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A complete dynamic power estimation model for data-paths in FPGA DSP designs

  • Published:2012-03 Issue:2 Volume:45 Page:172-185
  • ISSN:0167-9260
  • Container-title:Integration
  • language:en
  • Short-container-title:Integration

Author:

Jevtic Ruzica,Carreras Carlos

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Reference30 articles.

1. Power estimation techniques for FPGAs;Anderson;IEEE Transactions on Very Large Scale Integration (VLSI) Systems,2004

2. Post synthesis level power modelling of FPGAs;French,2005

3. Analytical high-level power model for LUT-based components;Jevtic,2008

4. Power modeling for high level power estimation;Gupta;IEEE Transactions on Very Large Scale Integration Systems,2000

5. High-level power modeling of CPLDs and FPGAs;Shang,2001

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1. A practical microwatt-meter for electrical energy measurement in programmable devices;Measurement and Control;2018-08-20

2. Power modeling on FPGA;Proceedings of the 15th ACM International Conference on Computing Frontiers;2018-05-08

3. Parallelization of Fuzzy ARTMAP Architecture on FPGA: Multispectral Classification of ALSAT-2A Images;IEEE Transactions on Industrial Electronics;2017-12

4. Fast Power and Performance Evaluation of FPGA-Based Wireless Communication Systems;IEEE Access;2016

5. A Formal Method for Optimal High-Level Casting of Heterogeneous Fixed-Point Adders and Subtractors;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2015-01
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