Introduction of a new technique for simultaneous reduction of the delay and leakage current in digital circuits
Author:
Publisher
Elsevier BV
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
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1. A simultaneous area, delay and leakage current reduction method for Linear Feedback Shift Register (LFSR) using pulsed latches and DTMOS transistors;e-Prime - Advances in Electrical Engineering, Electronics and Energy;2024-06
2. Power and Delay Analysis of a CMOS Inverter;2023 International Conference on Data Science and Network Security (ICDSNS);2023-07-28
3. A survey of leakage reduction techniques in CMOS digital circuits for nanoscale regime;Australian Journal of Electrical and Electronics Engineering;2021-08-22
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