Numerical modeling of Subthreshold region of junctionless double surrounding gate MOSFET (JLDSG)-Reference-Cited by-同舟云学术

Numerical modeling of Subthreshold region of junctionless double surrounding gate MOSFET (JLDSG)

Published:2016-02 Issue: Volume:90 Page:8-19
ISSN:0749-6036
Container-title:Superlattices and Microstructures
language:en
Short-container-title:Superlattices and Microstructures

Author:

Rewari Sonam,Haldar Subhasis,Nath Vandana,Deswal S.S.,Gupta R.S.

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,General Materials Science

Reference18 articles.

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3. Modeling of Nanoscale Gate-All- Around MOSFETs;Jimenez;IEEE, Electron device Lett.,2004

4. Gate-all-around (GAA) twin silicon nanowire MOSFET (TSNWFET) with 15 nm length gate and 4 nm radius nanowires;Yeo,2006

5. Design and performance analysis of cylindrical surrounding double-gate MOSFET for RF switch;Srivastava;Microelectron. Eng.,2011

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