Investigation of Ge based double gate dual metal tunnel FET novel architecture using various hetero dielectric materials

Author:

Gracia D.,Nirmal D.,Nisha Justeena A.

Funder

Department of Electronics and Information Technology, Government of India, New Delhi

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,General Materials Science

Reference32 articles.

1. Low-voltage tunnel transistors for beyond CMOS logic;Seabaugh;Proc. IEEE,2010

2. Tunneling field-effect transistors (TFETs) with subthreshold swing (SS) less than 60 mV/dec;Choi;IEEE Electron Device Lett.,2007

3. Hetero-gate-dielectric tunneling field effect transistors;Choi;IEEE Trans. Electron Devices,2010

4. Tunnel field effect trransistors:prospects and challenges;Avci;J. Electron Devices Soc.,2015

5. Double-gate tunnel FET with high-κ gate dielectric;Boucart;IEEE Trans. Electron Devices,2007

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