VHDL behavioural modelling of pipeline analog to digital converters

Author:

Acosta Antonio J.,Peralı́as Eduardo J.,Rueda Adoración,Huertas José L.

Publisher

Elsevier BV

Subject

Applied Mathematics,Electrical and Electronic Engineering,Condensed Matter Physics,Instrumentation

Reference11 articles.

1. IEEE Standard 1076-1993 VHDL. IEEE Press, New York, 1993.

2. IEEE Standard 1076.1 VHDL-AMS. IEEE Press, New York, 1999.

3. Analog VHDL;Rosinski,1998

4. Analog and Mixed-signal Hardware Description Languages;Vachoux,1997

5. Oversampling ΣΔ analog-to-digital converters modeling based on VHDL;Baraniecki;Analog Integrated Circuits and Signal Processing,1998

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2. Simulink Behavioral Modeling of a 10- bit Pipelined ADC;International Journal of Automation and Computing;2013-04

3. Behavioral Modeling of Multistage ADCS and Its Use for Design, Calibration and Test;Test and Design-for-Testability in Mixed-Signal Integrated Circuits;2004

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