Optimization of process conditions for the formation of hemispherical-grained (HSG) silicon in high-density DRAM capacitor-Reference-Cited by-同舟云学术

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Optimization of process conditions for the formation of hemispherical-grained (HSG) silicon in high-density DRAM capacitor

Published:2002-12 Issue:6 Volume:5 Page:497-503
ISSN:1369-8001
Container-title:Materials Science in Semiconductor Processing
language:en
Short-container-title:Materials Science in Semiconductor Processing

Author:

Joung Yang Hee,Kang Hee Soon,Kang Seong Jun

Publisher

Elsevier BV

Subject

Mechanical Engineering,Mechanics of Materials,Condensed Matter Physics,General Materials Science

Reference11 articles.

1. Kawamoto Y, Kaqa T. A 128um2 bit-line shielded memory cell technology for 64Mb DRAM. Proceedings of the Symposium on VLSI Technology, 1990. p. 13.

2. Ema T, Kawanago S, Nishida T. 3-dimensional stacked capacitor cell for 16M and 64M DRAM’s. IEDM Tech Dig, 1988. p. 592.

3. Rugged surface polycrystalline silicon film deposition and its application in a stacked dynamic random access memory capacitor electrode;Ino;J Vac Sci Technol B,1996

4. Thin nitride films on texture polysilicon to increase multimegabit DRAM cell charge capacity;Pierre;IEEE Electron Dev Lett,1990

5. An advanced technique for fabricating hemispherical-grained (HSG) silicon storage electrode;Watanabe;IEEE Trans Electron Dev,1995

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Features of the Morphology and Structure of Thin Silicon Films;Journal of Surface Investigation: X-ray, Synchrotron and Neutron Techniques;2021-01

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