Author:
Mondal Hemanta Kumar,Konar Sarnava,Hore Poulomi,Patra Ramapati,Sarkar Pradipta,Deb Sujay
Subject
Electrical and Electronic Engineering,General Computer Science
Reference31 articles.
1. S. Vangal et al. An 80-tile 1.28tflops network-on-chip in 65nm cmos.ISSCC 2007, 98–589.
2. 〈http://www.tilera.com〉 T. Corporation2010.
3. Parallelism-aware batch scheduling: enhancing both performance and fairness of shared dram systems;Mutlu;SIGARCH Comput. Archit. News,2008
4. Fair queuing memory systems;Nesbit;MICRO,2006
5. Achieving predictable performance through better memory controller placement in many-core cmps;Abts;ISCA,2009
Cited by
2 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献