Design for manufacturing meets advanced process control: A survey

Author:

Pan David Z.,Yu Peng,Cho Minsik,Ramalingam Anand,Kim Kiwoon,Rajaram Anand,Shi Sean X.

Publisher

Elsevier BV

Subject

Industrial and Manufacturing Engineering,Computer Science Applications,Modelling and Simulation,Control and Systems Engineering

Reference164 articles.

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3. A. Agarwal, D. Blaauw, V. Zolotov, S. Sundareswaran, M. Zhao, K. Gala, R. Panda, Path-based statistical timing analysis considering inter and intra-die correlations, in: Proceedings of IEEE/ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), 2002.

4. A. Agarwal, D. Blaauw, V. Zolotov, S. Vrudhula, Computation and refinement of statistical bounds on circuit delay, in: Proceedings of the Design Automation Conference, 2003.

5. A process-tolerant cache architecture for improved yield in nanoscale technologies;Agarwal;IEEE Transactions on Very Large Scale Integration (VLSI) Systems,2005

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