Surface residual stress in amorphous SiO2 insulating layer on Si substrate near a Cu through-silicon via (TSV) investigated by nanoindentation-Reference-Cited by-同舟云学术

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Surface residual stress in amorphous SiO2 insulating layer on Si substrate near a Cu through-silicon via (TSV) investigated by nanoindentation

Published:2021-11 Issue: Volume:135 Page:106153
ISSN:1369-8001
Container-title:Materials Science in Semiconductor Processing
language:en
Short-container-title:Materials Science in Semiconductor Processing

Author:

Kim Hangeul,Jeon Hansol,Lee Dong-Ju,Kim Ju-Young

Funder

Samsung

Ministry of Trade, Industry and Energy

Korea Evaluation Institute of Industrial Technology

Publisher

Elsevier BV

Subject

Mechanical Engineering,Mechanics of Materials,Condensed Matter Physics,General Materials Science

Reference49 articles.

1. 3-D hyperintegration and packaging technologies for micro-nano systems;Lu;Proc. IEEE,2009

2. Through-silicon via (TSV);Motoyoshi;Proc. IEEE,2009

3. Three dimensional silicon integration;Knickerbocker;IBM J. Res. Dev.,2008

4. Overview and outlook of through‐silicon via (TSV) and 3D integrations;Lau;Microelectron. Int.,2011

5. Influence of interfacial intermetallic compound on fracture behavior of solder joints;Lee;Mater. Sci. Eng.,2003

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