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Two-Operand Addition

Published:2004 Issue: Volume: Page:50-135
ISSN:
Container-title:Digital Arithmetic
language:
Short-container-title:

Author:

Ercegovac Miloš D.,Lang Tomás

Publisher

Elsevier

Reference94 articles.

1. The IBM 360/370 model 91: floating-point execution unit;Anderson;IBM Journal of Research and Development,1967

2. Design of the arithmetic units of ILLIAC III: Use of redundancy and higher radix methods;Atkins;IEEE Transactions on Computers,1970

3. A Study of Redundant Number Representations for Parallel Digital Computers;Avizienis,1960

4. Signed digit number representations for fast parallel arithmetic;Avizienis;IRE Transactions on Electronic Computers,1961

5. On flexible implementation of digital computer arithmetic;Avizienis,1962

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4. New Formats for Computing with Real-Numbers under Round-to-Nearest;IEEE Transactions on Computers;2016-07-01

5. Design and Implementation of an Embedded FPGA Floating Point DSP Block;2015 IEEE 22nd Symposium on Computer Arithmetic;2015-06

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