An improved design and simulation of low-power and area efficient parallel binary comparator-Reference-Cited by-同舟云学术

An improved design and simulation of low-power and area efficient parallel binary comparator

Published:2017-08 Issue: Volume:66 Page:84-88
ISSN:0026-2692
Container-title:Microelectronics Journal
language:en
Short-container-title:Microelectronics Journal

Author:

Chua Chang,Kumar R.B.N.

Publisher

Elsevier BV

Subject

General Engineering

Reference13 articles.

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3. SN7485 4-bit Magnitude Comparators, Texas Instruments, Dallas, TX, 1999.

4. Wang Guangjie, Sheng Shimin, Ji Lijiu, New efficient design of digital comparator, in: ASIC, 1996, 2nd International Conference on, vol., no., 21–24 Oct 1996, pp. 263–266.

5. Digital Arithmetic;Ercegovac,2004

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