An even faster systolic array for matrix multiplication-Reference-Cited by-同舟云学术

An even faster systolic array for matrix multiplication

Published:1989-11 Issue:2 Volume:12 Page:249-254
ISSN:0167-8191
Container-title:Parallel Computing
language:en
Short-container-title:Parallel Computing

Author:

Benaini Abdelhamid,Robert Yves

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Graphics and Computer-Aided Design,Computer Networks and Communications,Hardware and Architecture,Theoretical Computer Science,Software

Reference24 articles.

1. Conception et validation des algorithmes systoliques;Benaini,1988

2. Matrix product on linear systolic arrays;Benaini,1989

3. VLSI systems for matrix multiplication;Cheng,1985

4. Parallel Algorithms and Architectures,1986

5. A family of new efficient arrays for matrix multiplication;Jagadish;IEEE Trans. Comput.,1989

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4. Some new designs of 2-D array for matrix multiplication and transitive closure;IEEE Transactions on Parallel and Distributed Systems;1995-04

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