Improvement of trace-driven I-Cache timing attack on the RSA algorithm-Reference-Cited by-同舟云学术

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Improvement of trace-driven I-Cache timing attack on the RSA algorithm

Published:2013-01 Issue:1 Volume:86 Page:100-107
ISSN:0164-1212
Container-title:Journal of Systems and Software
language:en
Short-container-title:Journal of Systems and Software

Author:

Chen CaiSen,Wang Tao,Kou YingZhan,Chen XiaoCen,Li Xiong

Publisher

Elsevier BV

Subject

Hardware and Architecture,Information Systems,Software

Reference21 articles.

1. A vulnerability in RSA implementations due to instruction cache analysis and its demonstration on OpenSSL;Aciicmez,2008

2. Cheap hardware parallelism implies cheap security;Aciicmez,2007

3. On the power of simple branch prediction analysis;Aciicmez,2007

4. Micro-architectural cryptanalysis;Aciicmez;IEEE Security and Privacy,2007

5. Predicting secret keys via branch prediction;Aciicmez,2007

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