Objective comparison of 32-bit buses
Author:
Publisher
Elsevier BV
Subject
Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software
Reference6 articles.
1. The proposed IEEE 896 Futurebus — a solution to the bus driving problem;Balakrishnan;IEEE Micro,1984
2. Wire-OR logic on transmission lines;Gustavson;IEEE Micro,1983
3. Katz, Ret al ‘Implementing a cache consistency protocol’ Proc. 12th Annual Computer Architecture Conf. IEEE Computer Society Press pp 276–283
4. The Futurebus cacheing system;Sweazey,1985
5. An advanced communications protocol forthe proposed IEEE 896 Futurebus;Borrill;IEEE Micro,1984
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1. Design of a Broadcasting Modem for a DC PLC Scheme;IEEE/ASME Transactions on Mechatronics;2006-10
2. Buses and bus standards 1Originally published in Computer Standards and Interfaces, volume 6 (1987), pages 403–425. Copyright of original article: 0920-5489/87/$3.50 © 1987, Elsevier Science Publishers B.V. (North-Holland). All rights reserved. 1;Computer Standards & Interfaces;1999-02
3. Grundzüge der Prozessor-Architekturen;Rechnerarchitektur;1993
4. Busse;RISC-Workstation-Architekturen;1991
5. Beispiele für Standard-Busse;Multiprozessorsysteme;1990
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