A performance comparison of several superscalar processor models with a VLIW processor
Author:
Publisher
Elsevier BV
Subject
Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software
Reference16 articles.
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3. A VLIW architecture for a trace scheduling compiler;Colwell;IEEE Trans. Comput.,1988
4. An efficient algorithm for exploiting multiple arithmetic units;Tomasulo;IBM J. Res. Devel.,1967
5. Instruction issue logic for high performance, interruptible, multiple functional unit, pipelined computers;Sohi;IEEE Trans. Comput.,1990
Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Design of Multi-mode Processor for Embedded Application;2009 Pacific-Asia Conference on Circuits, Communications and Systems;2009-05
2. Technology and business: forces driving microprocessor evolution;Proceedings of the IEEE;1995
3. Performance issues of a superscalar microprocessor;Microprocessors and Microsystems;1995-01
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