Investigation of disturbance for the new dual floating gate multilevel flash cells-Reference-Cited by-同舟云学术

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Investigation of disturbance for the new dual floating gate multilevel flash cells

Published:2002-08 Issue:8 Volume:46 Page:1145-1150
ISSN:0038-1101
Container-title:Solid-State Electronics
language:en
Short-container-title:Solid-State Electronics

Author:

Lin Hongchin,Chen Jack Tai-Yuan,Chang Jyh-Haur

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference9 articles.

1. Multilevel flash cells and their trade-offs;Eitan;IDEM Tech Dig,1996

2. Low-voltage multi-level flash memory: determination of minimum spacing between multi-levels;Chi;Proc Int Conf Semicond Electron,1996

3. A dual gate flash EEPROM cell with tow-bit storage capacity;Lorenzini;IEEE Trans Components, Packaging, Manuf Technol, Part A,1997

4. A new dual floating gate flash cell for multilevel operation;Chen;Int Conf Solid-State Dev Mater,2000

5. MEDICI User's Manual, Avant! Corp., 1998

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