Pseudo differential multi-cell upset immune robust SRAM cell for ultra-low power applications

Author:

Ahmad Sayeed,Alam Naushad,Hasan Mohd.

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering

Reference42 articles.

1. Kumar A, Rabaey J, Ramchandran K. SRAM supply voltage scaling: a reliability perspective. In: Int. Symp. Quality of Electronic Design (ISQED); 2009. p. 782–7.

2. Supply voltage decision methodology to minimize SRAM standby power under radiation environment;Galib;IEEE Trans Nucl Sci,2015

3. A 40 nm 512 kb cross-point 8T pipeline SRAM with binary word-line boosting control, ripple bit-line and adaptive data-aware write-assist;Lien;IEEE Trans Circ Syst-I: Regular Pap,2014

4. Adaptive body bias for reducing the impacts of NBTI and process variations on 6T SRAM Cells;Mostafa;IEEE Trans Circ Syst I: Regular Pap,2011

5. Read bitline sensing and fast local write-back techniques in hierarchical bitline architecture for ultralow-voltage SRAMs;Wang;IEEE Trans VLSI Syst,2016

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