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A four quadrant high-speed CMOS analog multiplier based on the flipped voltage follower cell

  • Published:2021-02 Issue: Volume:130 Page:153582
  • ISSN:1434-8411
  • Container-title:AEU - International Journal of Electronics and Communications
  • language:en
  • Short-container-title:AEU - International Journal of Electronics and Communications

Author:

Diaz-Sanchez Alejandro,Mateus-Ardila Juan Carlos,Zamora-Mejia Gregorio,Diaz-Armendariz Alejandra,Rocha-Perez Jose Miguel,Moreno-Coria Luis Armando

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering

Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A class AB ultra-low-power asymmetrical structured current multiplier;AEU - International Journal of Electronics and Communications;2024-11

2. Analysis and Design of a Low-Voltage Low-Power High SNDR Current-Mode Sample and Hold Circuit Based on CMOS Technology;Wireless Personal Communications;2024-07

3. DTMOS based four-quadrant multiplier/divider with voltage difference transconductance amplifier;Analog Integrated Circuits and Signal Processing;2024-01-17

4. A Low-Voltage Four-Quadrant Current-Mode Precision Multiplier/Divider Employing Single BiCMOS VDGA;2023 Research, Invention, and Innovation Congress: Innovative Electricals and Electronics (RI2C);2023-08-24

5. Low Voltage High Performance CMOS Current Mode Four-Quadrant Analog Multiplier Circuit;Radioengineering;2022-05-16
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