A compact four quadrant CMOS analog multiplier-Reference-Cited by-同舟云学术

A compact four quadrant CMOS analog multiplier

Published:2019-08 Issue: Volume:108 Page:53-61
ISSN:1434-8411
Container-title:AEU - International Journal of Electronics and Communications
language:en
Short-container-title:AEU - International Journal of Electronics and Communications

Author:

Rocha-Perez Jose Miguel,Zamora-Mejia Gregorio,Diaz-Armendariz Alejandra,Bautista-Castillo Alejandro Israel,Diaz-Sanchez Alejandro,Ramirez-Angulo Jaime

Funder

National Council of Science and Technology of Mexico

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering

Reference21 articles.

1. A new highly accurate CMOS current-mode four-quadrant multiplier;Absi;Arab J Sci Eng,2014

2. Ultra-low voltage and low-power voltage-mode DTMOS-based four-quadrant analog multiplier;Babacan,2018

3. Cardoso FM, Schneider MC, Santana EP. CMOS analog multiplier with high rejection of power supply ripple. In: IEEE 9th Latin American Symposium on Circuits & Systems (LASCAS), Puerto Vallarta, Mexico; 2018.

4. Bandwidth extension of analog multiplier using dynamic threshold MOS transistor;Chaudhry,2014

5. Pseudo-exponential function for MOSFETs in saturation;Cheng-Chieh;IEEE Trans Circuits Syst–II. Analog Dig Signal Process,2000

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