1. Design of a 5-bit, 4.87 GS/s, 240μW flash ADC using a MUX-based decoder with regenerative buffer in 45-nm CMOS,2015
2. A 6-bit 800MS/s flash ADC in 0.35 μm CMOS,2015
3. A 82-nW chaotic map true random number generator based on a sub-ranging SAR ADC;Kim;IEEE J. Solid State Circ.,2017
4. Combination of DAC switches and SAR logics in a 720 MS/s low-bit successive approximation ADC;Damghanian;Analog Integr. Circuits Signal Process.,2014
5. A self-biased current-mode amplifier with an application to 10-bit pipeline ADC;Choi;IEEE Trans. Circ. Syst. I: Reg. Pap.,2017