Analysis and Mitigation of Negative Differential Resistance effects in Double-Gate Silicon-on-Insulator Negative Capacitance Field Effect Transistor with improved analog performance-Reference-Cited by-同舟云学术

Analysis and Mitigation of Negative Differential Resistance effects in Double-Gate Silicon-on-Insulator Negative Capacitance Field Effect Transistor with improved analog performance

Published:2023-06 Issue: Volume:136 Page:105777
ISSN:0026-2692
Container-title:Microelectronics Journal
language:en
Short-container-title:Microelectronics Journal

Author:

Pratap Manas^ORCID,Kansal Harshit,Medury Aditya Sankar

Publisher

Elsevier BV

Subject

General Engineering

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5. Analytical modeling of direct tunneling current through gate stacks for the determination of suitable high-k dielectrics for nanoscale double-gate MOSFETs;Darbandy;Semicond. Sci. Technol.,2011

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