Analytical drain current model development of twin gate TFET in subthreshold and super threshold regions-Reference-Cited by-同舟云学术

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Analytical drain current model development of twin gate TFET in subthreshold and super threshold regions

Published:2023-05 Issue: Volume:135 Page:105761
ISSN:0026-2692
Container-title:Microelectronics Journal
language:en
Short-container-title:Microelectronics Journal

Author:

Raut Pratikhya,Nanda Umakanta^ORCID,Panda Deepak Kumar

Publisher

Elsevier BV

Subject

General Engineering

Reference30 articles.

1. Das, D., & Chakraborty, U. Investigation of interface trap charges and temperature on RF performance with noise analysis for IoT application of a heterojunction tunnel FET. In Internet of Things and Data Mining for Modern Engineering and Healthcare Applications(pp. 219-234). Chapman and Hall/CRC.

2. Prospect of tunneling green transistor for 0.1 V CMOS;Hu,2010

3. RF and linearity parameter analysis of junction-less gate all around (JLGAA) MOSFETs and their dependence on gate work function;Raut;Silicon,2022

4. Analysis of nanoscale digital circuits using novel drain-gate underlap DMG hetero-dielectric TFET;Gracia;Microelectron. J.,2022

5. RF with linearity and non-linearity parameter analysis of gate all around negative capacitance junction less FET (GAA-NC-JLFET) for different ferroelectric thickness;Raut;Phys. Scripta,2022

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