1. ‘A survey of cache coherence schemes for multiprocessors,’’;Stenstrom;Computer,1990
2. ‘Comparison of Memory Write Policies for NoC Based Multicore Cache Coherent Systems,’’ in Proc. Design;de Massas,2008
3. ‘Design of an adaptive cache coherence protocol for large scale multiprocessors;Yang;IEEE Trans. Parallel Distr. Syst.,1992
4. ‘RIMAC: a novel redundancy-based hierarchical cache architecture for energy efficient, high performance storage systems;Yao;’’ in Proc. 1st ACM SIGOPS/EuroSys Eur. Conf. Comput. Syst. (EuroSys),2006
5. ‘Solving dense linear systems on platforms with multiple hardware accelerators;Quintana-Ortí;’’ in Proc. 14th ACM SIGPLAN Symp. Principles Pract. Parallel Program,2009