A Fractional-N CP-PLL with fast two-point modulation calibration using duty-cycle and polarity tracking technique in 110-nm CMOS-Reference-Cited by-同舟云学术

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A Fractional-N CP-PLL with fast two-point modulation calibration using duty-cycle and polarity tracking technique in 110-nm CMOS

Published:2023-02 Issue: Volume:132 Page:105676
ISSN:0026-2692
Container-title:Microelectronics Journal
language:en
Short-container-title:Microelectronics Journal

Author:

Jin Zirui,Hu Ang,Shan Xiaoyu,Zhang Chengcheng,Cui Jinsong,Lei Jianming,Liu Dongsheng^ORCID

Publisher

Elsevier BV

Subject

General Engineering

Reference22 articles.

1. A 5.5-GHz background-calibrated subsampling polar transmitter with −41.3-dB EVM at 1024 QAM in 28-nm CMOS;Markulic;IEEE J. Solid State Circ.,2019

2. A novel digital-intensive hybrid polar-I/Q RF transmitter architecture;Buckel;IEEE Trans. Circuits Syst. Regul. Pap.,2018

3. A WCDMA/WLAN digital polar transmitter with low-noise ADPLL, wideband PM/AM modulator, and linearized PA;Zheng;IEEE J. Solid State Circ.,2015

4. Digitally modulated CMOS polar transmitters for highly-efficient mm-wave wireless communication;Khalaf;IEEE J. Solid State Circ.,2016

5. VCO Gain Calibration Technique for GSM/EDGE Polar Modulated Transmitter;Ahn,2008

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Design and verification of an FPGA programmable logic element based on Sense-Switch pFLASH;Frontiers of Information Technology & Electronic Engineering;2024-04

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