A circuit-compatible analytical device model for ballistic nanowire transistors

Author:

Chen Jinghong

Publisher

Elsevier BV

Subject

General Engineering

Reference9 articles.

1. 〈http://www.sciencedaily.com/releases/2005/04/050427200520.htm〉.

2. Y. Li, C.-S. Lu, Characteristic comparison of SRAM cells with 20nm planar MOSFET, Omega FinFET and Nanowire FinFET, in: The Sixth IEEE Conference on Nanotechcnology, vol. 1, 2006, pp. 339–342.

3. C. Dong, S. Haruehanroengra, W. Wang, Exploring carbon nanotubes and NiSi nanowires as on-chip interconnections, in: 2006 IEEE International Symposium on Circuits and Systems, May 2006, pp. 3510–3514.

4. J. Wang, Device physics and simulation of silicon nanowire transistors, a preliminary report, Purdue University, 2004.

5. On the validity of the parabolic effective-mass approximation for the I–V calculation of silicon nanowire transistors;Wang;IEEE Trans. Electron Devices,2005

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