1. P. Wambacq, G. Vandersteen, J. Phillips, J. Roychowdhury, W. Eberle, B. Yang, D. Long, A. Demir, CAD for RF circuits, in: Proceedings of the Design, Automation and Test in Europe Conference and Exhibition, 2001, pp. 520–527.
2. S. Bhattacharya, N. Jangkrajarng, R. Hartono, R. Shi, Hierarchical extraction and verification of symmetry constraints for analog layout automation, in: Proceedings of the Asia and South Pacific Design Automation Conference, 2004, pp. 400–405.
3. D. Leenaerts, G. Gielen, R. Rutenbar, CAD solutions and outstanding challenges for mixed-signal and RF IC design, in: Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2001, pp. 270–277.
4. B.D. Smedt, G. Gielen, WATSON: design space boundary exploration and model generation for analog and RFIC design, IEEE Trans. Comput.-Aided Des. Integrated Circuits Syst. (2003) 213–224.
5. D. Shaeffer, T. Lee, A 1.5-V, 1.5-GHz CMOS low noise amplifier, IEEE J. Solid-State Circuits (1997) 745–759.