A hybrid SAR ADC with input range extension
Author:
Funder
Natural Science Foundation of Guangdong Province
Nankai University
Fundamental Research Funds for the Central Universities
National Natural Science Foundation of China
Publisher
Elsevier BV
Reference29 articles.
1. A 12-bit 260-MS/s pipelined-SAR ADC with ring-TDC-based fine quantizer for automatic cross-domain scale alignment;Zhao;IEEE J. Solid State Circ.,2023
2. A nyquist rate SAR ADC employing incremental sigma delta DAC achieving peak SFDR = 107 dB at 80 kS/s;AlMarashli;IEEE J. Solid State Circ.,2018
3. A 0.20 mm2 3 nW signal acquisition IC for miniature sensor nodes in 65 nm CMOS;Harpe;IEEE J. Solid State Circ.,2016
4. A 7.1-fJ/conversion step 88-dB SFDR SAR ADC with energy-free ‘swap to reset;Liu;IEEE J. Solid State Circ.,2017
5. Low-power SAR ADCs: trends, examples, and future;Harpe,2019
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