A fully integrated CMOS voltage regulator for supply-noise-insensitive charge pump PLL design
Author:
Publisher
Elsevier BV
Subject
General Engineering
Reference13 articles.
1. Low-jitter process-independent DLL and PLL based on self-biased techniques;Maneatis;IEEE J. Solid-State Circuits,1996
2. An on-chip calibration technique for reducing supply voltage sensitivity in ring oscillators;Ting;IEEE J. Solid-State Circuits,2007
3. A supply-noise-insensitive CMOS PLL with a voltage regulator using DC–DC capacitive converter;Chang-Hyeon;IEEE J. Solid-State Circuits,2001
4. Low-power supply-regulation techniques for ring oscillators in phase-locked loops using a split-tuned architecture;Arakali;IEEE J. Solid-State Circuits,2009
5. A 320MHz, 1.5mW@1.35V CMOS PLL for microprocessor clock generation;von Kaenel;IEEE J. Solid-State Circuits,1996
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