MOS current mode logic exclusive-OR gate using multi-threshold triple-tail cells

Author:

Pandey Neeta,Gupta Kirti,Bhatia Garima,Choudhary Bharat

Publisher

Elsevier BV

Subject

General Engineering

Reference17 articles.

1. An MOS current mode logic (MCML) circuit for low-power sub-GHz processors;Yamashina;IEICE Trans. Electron.,1992

2. MOS current mode circuits: analysis, design, and variability;Hassan;IEEE Trans. Very Large Scale Integr. (VLSI) Syst.,2005

3. S. Bruma, Impact of on-chip process variations on MCML performance, in: Proceedings of the IEEE Conference on Systems-on-Chip, 2003, pp.135–140.

4. Impact of technology scaling on CMOS logic styles;Anis;IEEE Trans. Circuits Syst. II,2002

5. Z. Toprak, Y. Leblebici, Low-power current mode logic for improved DPA-resistance in embedded systems, in: Proceedings of the IEEE International Symposium on Circuits System, May 2005.

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