Impact of temperature and interface trapped charges variation on the Analog/RF and linearity of vertically extended drain double gate Si0.5Ge0.5 source tunnel FET-Reference-Cited by-同舟云学术

Impact of temperature and interface trapped charges variation on the Analog/RF and linearity of vertically extended drain double gate Si0.5Ge0.5 source tunnel FET

Published:2021-07 Issue: Volume:113 Page:105077
ISSN:0026-2692
Container-title:Microelectronics Journal
language:en
Short-container-title:Microelectronics Journal

Author:

Kumari Pallavi,Raj Anand,Priyadarshani Kumari Nibha,Singh Sangeeta

Publisher

Elsevier BV

Subject

General Engineering

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