1. The electromagnetic compatibility of Integrated circuits—past, present, and future;Ramdani;IEEE Trans. Electromagn C.,2009
2. Cmos downsizing toward sub-10 nm;Iwai;Solid State Electron.,2004
3. Cmos transistor design challenges for mobile and digital consumer applications;Wu;Proceedings 7th International Conference on Solid-State and Integrated Circuits Technology,2004
4. The fundamental downscaling limit of field effect transistors;Mamaluy;Appl. Phys. Lett.,2015
5. Gate-normal negative capacitance TUNNEL field-effect transistor (TFET) with CHANNEL doping engineering;Kim;IEEE Trans. Nanotechnol.,2021