Design of a 16-bit 500-MS/s SAR-ADC for low-power application

Author:

Singh Tejender,Lata Tripathi Suman

Publisher

Elsevier

Reference64 articles.

1. A 0.5 V 8–12 Bit 300 KSPS SAR ADC with Adaptive Conversion Time Detection-And-Control for High Immunity to PVT Variations;Eon Kim,2020

2. A low power 12-bit 1-kS/s SAR ADC for biomedical signal processing;Mao;IEEE Trans. Cir. Syst.–I,2019

3. Design and Analysis of a Low-Power 8-Bit 500 KS/S SAR ADC for Bio-Medical Implant Devices;Mazidi,2016

4. Design of low power high-speed SAR based 16-bit analog to digital converter: charge sharing approach;Umer Zahal C P.B,2016

5. A 16-bit 16-MS/s SAR ADC with On-Chip Calibration in 55-nm CMOS;Shen;IEEE J. Solid-St. Circ.,2018

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1. Design of a 16–bit 500 MS s–1 SAR-ADC at 45 nm for low power and high frequency applications;Engineering Research Express;2024-02-15

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3. Low Power Bio-Amplifier Using Charge Distribution Technique at CMOS 45nm Technology:A Review;2023 IEEE Devices for Integrated Circuit (DevIC);2023-04-07

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5. Design and Analysis of Low Power Bio-amplifier with Current Mirror Topology at CMOS 45nm Technology Node;2022 14th International Conference on Electronics, Computers and Artificial Intelligence (ECAI);2022-06-30

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