FPGA architecture and implementation of sparse matrix–vector multiplication for the finite element method-Reference-Cited by-同舟云学术

FPGA architecture and implementation of sparse matrix–vector multiplication for the finite element method

Published:2008-04 Issue:8 Volume:178 Page:558-570
ISSN:0010-4655
Container-title:Computer Physics Communications
language:en
Short-container-title:Computer Physics Communications

Author:

Elkurdi Yousef,Fernández David,Souleimanov Evgueni,Giannacopoulos Dennis,Gross Warren J.

Publisher

Elsevier BV

Subject

General Physics and Astronomy,Hardware and Architecture

Reference17 articles.

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3. The Transmogrifier-4 project, http://www.eecg.utoronto.ca/~tm4/, University of Toronto, 2005

4. BEE2: A multi-purpose computing platform, http://bwrc.eecs.berkeley.edu/Research/BEE/BEE2/, Berkeley Wireless Research Center, University of California, 2004

5. SPAR: a new architecture for large finite element computations;Taylor;IEEE Transactions on Computers,1995

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