A low-area unified hardware architecture for the AES and the cryptographic hash function Grøstl-Reference-Cited by-同舟云学术

A low-area unified hardware architecture for the AES and the cryptographic hash function Grøstl

Published:2017-08 Issue: Volume:106 Page:106-120
ISSN:0743-7315
Container-title:Journal of Parallel and Distributed Computing
language:en
Short-container-title:Journal of Parallel and Distributed Computing

Author:

At Nuray,Beuchat Jean-Luc,Okamoto Eiji,San Ismail,Yamazaki Teppei

Funder

Xilinx University Program

Japanese Society for the Promotion of Science (JSPS)

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Theoretical Computer Science,Software

Reference30 articles.

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3. Compact implementation of Threefish and Skein on FPGA;At,2012

4. J.-P. Aumasson, L. Henzen, W. Meier, R. Phan, SHA-3 proposal BLAKE (version 1.4), (Jan. 2011). available at http://www.131002.net/blake.

5. R. Benadjila, O. Billet, H. Gilbert, G. Macario-Rat, T. Peyrin, M. Robshaw, Y. Seurin, SHA-3 proposal: ECHO, 2009. available at http://crypto.rd.francetelecom.com/echo.

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