Compact Hardware Implementations of ChaCha, BLAKE, Threefish, and Skein on FPGA

Author:

At Nuray,Beuchat Jean-Luc,Okamoto Eiji,San Ismail,Yamazaki Teppei

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 21 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. High‐Performance Hardware Structure of ChaCha20 Stream Cipher Based on Sparse Parallel Prefix Adder;International Journal of Circuit Theory and Applications;2024-09-04

2. High-efficiency Reconfigurable Crypto Accelerator Utilizing Innovative Resource Sharing and Parallel Processing;2023 IEEE 16th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC);2023-12-18

3. Flexible and Scalable BLAKE/BLAKE2 Coprocessor for Blockchain-Based IoT Applications;IEEE Design & Test;2023-10

4. Versatile Resource-shared Cryptographic Accelerator for Multi-Domain Applications;2023 International Conference on IC Design and Technology (ICICDT);2023-09-25

5. Energy-Efficient Unified Multi-Hash Coprocessor for Securing IoT Systems Integrating Blockchain;2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS);2023-08-06

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