CFPA: Congestion aware, fault tolerant and process variation aware adaptive routing algorithm for asynchronous Networks-on-Chip-Reference-Cited by-同舟云学术

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CFPA: Congestion aware, fault tolerant and process variation aware adaptive routing algorithm for asynchronous Networks-on-Chip

Published:2019-06 Issue: Volume:128 Page:151-166
ISSN:0743-7315
Container-title:Journal of Parallel and Distributed Computing
language:en
Short-container-title:Journal of Parallel and Distributed Computing

Author:

Muhammad Sayed T.,Saad Mohamed,El-Moursy Ali A.,El-Moursy Magdy A.,Hamed Hesham F.A.

Funder

Distributed and Networked Systems Research Group Operating, United Arab Emirates

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Theoretical Computer Science,Software

Reference42 articles.

1. M. Ali, W. Michael, S. Hessler, A fault tolerant mechanism for handling permanent and transient failures in network on chip, in: The Proceedings of Information Technology ITNG, International Conference on, 2007, pp. 1027–1032.

2. Y. Ben-Itzhak, E. Zahavi, I. Cidon, A. Kolodny, HNOCS: Modular open-source simulator for heterogeneous NoCs, in: The Proceedings of the International Conference on Embedded Computer Systems, 2012, pp. 51–57.

3. M. Boegli, T. De Laet, J. De Schutter, J. Swevers, A split-horizon scheme for on-line friction parameter estimation, in: The IEEE/ASME Advanced Intelligent Mechatronics Conference, 2011, pp. 572–575.

4. Improving networks-on-chip performability: A topology-based approach;Elmiligi;Intl. J. Circuit Theory Appl.,2011

5. Analysis and Design of Networks-on-Chip Under High Process Variation;Ezz-Eldin,2015

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4. Multi-objective biogeography-based optimization and reinforcement learning hybridization for network-on chip reliability improvement;Journal of Parallel and Distributed Computing;2022-03

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