Author:
Gan Zhihua,Zhang Mingquan,Gu Zhimin,Tan Hai,Zhang Jizan
Funder
National Natural Science Foundation of China
Subject
Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Theoretical Computer Science,Software
Reference31 articles.
1. Building timing predictable embedded systems;Axer;ACM Trans. Embedded Comput. Syst.,2014
2. D. Burger, T.M. Austin, The SimpleScalar tool set, version 2.0.
3. A unified WCET analysis framework for multi-core platforms;Chattopadhyay;ACM Trans. Embedded Comput. Syst.,2014
4. S. Chattopadhyay, A. Roychoudhury, T. Mitra, Modeling shared cache and bus in multi-cores for timing analysis, in: Proceedings of the 13th International Workshop on Software & Compilers for Embedded Systems, 2010, pp. 1–10.
5. F. Chen, D. Zhang, Z. Wang, Static analysis of run-time inter-thread interferences in shared cache multi-core architectures based on instruction fetching timing, in: IEEE International Conference on Computer Science and Automation Engineering, 2012, pp. 208–212.
Cited by
1 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献