Design and performance of a pixel-level pipelined-parallel architecture for high speed wavelet-based image compression-Reference-Cited by-同舟云学术

Design and performance of a pixel-level pipelined-parallel architecture for high speed wavelet-based image compression

Published:2005-11 Issue:8 Volume:31 Page:572-588
ISSN:0045-7906
Container-title:Computers & Electrical Engineering
language:en
Short-container-title:Computers & Electrical Engineering

Author:

Masoudnia A.,Sarbazi-Azad H.,Boussakta S.

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,General Computer Science,Control and Systems Engineering

Reference20 articles.

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5. Vadskær Jensen M, Nielsen B. Real-time layered video compression using SIMD computation. In: Proc 4th Int Conf of the Austrian Centre for parallel computation (ACPC’99), LNCS 1557; 1999 p. 85–95.

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