Triple module redundancy reliability framework design based on heterogeneous multi-core processor

Author:

Su Haomiao,Lu Tiejun,Feng Changlei,Chen Lei

Publisher

Elsevier BV

Subject

General Engineering

Reference20 articles.

1. Eng. Dragoș-Ronald Rugescu, L.A.V., Gracefully Degrading Triple Modular Redundancy in FPGA Design with Application to Harsh Radiation Environments. 2016 15th RoEduNet Conference: Networking in Education and Research, 2016.

2. Dual-Core Lockstep enhanced with redundant multithread support and control-flow error detection;Peña-Fernández;Microelectronics Reliability,2019

3. Zhou, B., et al., Research and Implementation of Spacecraft On-Board Software Maintenance Based on TMR System, in 2018 Eighth International Conference on Instrumentation & Measurement, Computer, Communication and Control (IMCCC). 2018. p. 366-369.

4. Fault-tolerant method for anti-SEU of embedded system based on dual-core processor;Cui;The Journal of Engineering,2019

5. Modular fault tolerant processor architecture on a SoC for space;Tabero;Microelectronics Reliability,2018

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